\n\u867d\u7136Arty-Z7\u4e0d\u5728\u5217\u8868\u4e2d\uff0c\u4f46\u662f\u6211\u5c1d\u8bd5\u4f7f\u7528ZYBO\u7684\u7248\u672c\u5e76\u6210\u529f\u5730\u542f\u52a8\u4e86(?), \u6240\u4ee5\u5c31\u5148\u7528\u8fd9\u4e2a\u7248\u672c\u5427\u3002<\/p>\n
\u751f\u6210bit\u6d41\uff08FPGA\u914d\u7f6e\u6570\u636e\uff09\u6309\u7167Digilent\u516c\u53f8\u7684\u6559\u7a0b\uff0c\u6211\u4eec\u5c06\u521b\u5efa\u4e00\u4e2aZynq+GPIO\uff08\u901a\u7528\u8f93\u5165\u8f93\u51fa\uff09\u7684\u8bbe\u8ba1\u3002
\n\u5728\u5f00\u59cb\u4e4b\u524d\uff0c\u60a8\u9700\u8981\u5c06\u60a8\u73b0\u6709\u7684FPGA\u677f\u7684\u677f\u6587\u4ef6\u653e\u5165vivado\u7684\u6587\u4ef6\u5939\u4e2d\u3002
\n\u7531\u4e8e\u6211\u4eec\u672c\u6b21\u4e0d\u4f7f\u7528SDK\uff0c\u5b8c\u6210\u5230\u7b2c6\u6b65\u201c\u751f\u6210\u6bd4\u7279\u6d41\u201d\u540e\u5373\u53ef\u3002
\n\u6bd4\u7279\u6d41\u5c06\u751f\u6210\u5728\u9879\u76ee\u6587\u4ef6\u5939\u7684<\u9879\u76ee\u540d\u79f0>.runs\\impl_1<\u9876\u5c42\u6a21\u5757\u540d\u79f0>.bit\u6587\u4ef6\u5939\u4e2d\u3002
\n\u5728\u8fd9\u91cc\uff0c\u60a8\u53ef\u4ee5\u67e5\u770b\u5df2\u751f\u6210\u8bbe\u8ba1\u7684\u5757\u8bbe\u8ba1\u5730\u5740\u7f16\u8f91\u5668\uff0c\u5e76\u786e\u8ba4GPIO\u6a21\u5757\u7684\u57fa\u7840\u5730\u5740\u3002<\/p>\n![\"image.png\"](\"https:\/\/cdn.silicloud.com\/blog-img\/blog\/img\/657c2015d0c9c81e0f5bc3fd\/5-0.png\" "\\"\\"")
<\/p>\n![\"image.png\"](\"https:\/\/cdn.silicloud.com\/blog-img\/blog\/img\/657c2015d0c9c81e0f5bc3fd\/6-0.png\" "\\"\\"")
<\/p>\n\u901a\u8fc7\u8bbe\u5907\u6811\u5c06\u751f\u6210\u7684FPGA\u4e8c\u8fdb\u5236\u6587\u4ef6\u52a0\u8f7d\u8fdb\u53bb\u3002\u4f7f\u7528Teraterm\u7b49\u8fde\u63a5\u5230Zynq\u677f\uff0c\u5e76\u4f7f\u7528fpga\u7528\u6237\u767b\u5f55\u3002\u5bc6\u7801\u4e3afpga\u3002<\/p>\ndebian-fpga login: fpga\r\nPassword:\r\nLast login: Fri Nov 4 02:17:08 JST 2016 on ttyPS0\r\n<\/span>Linux debian-fpga 4.12.14-armv7-fpga #<\/span>3 SMP PREEMPT Mon Nov 13 15:14:45 JST 2017 armv7l\r\n\r\nThe programs included with the Debian GNU\/Linux system are free software;<\/span>\r\nthe exact distribution terms for each program are described in the\r\nindividual files in \/usr\/share\/doc\/*\/copyright.\r\n\r\nDebian GNU\/Linux comes with ABSOLUTELY NO WARRANTY, to the extent\r\npermitted by applicable law.\r\n<\/span>fpga@debian-fpga:~$<\/span>\r\n<\/code><\/pre>\n\u8bf7\u628a\u6837\u672c\u62ff\u6765\u3002\u62ff\u6765\u7684\u662fexamples\/uio_irq_sample\u3002<\/p>\n
fpga@debian-fpga:~$ cp examples\/uio_irq_sample\/ ~\/my_uio_sample -r\r\nfpga@debian-fpga:~$ cd my_uio_sample\r\nfpga@debian-fpga:~\/my_uio_sample$ ls -l\r\ntotal 1648\r\n-rw-r--r-- 1 fpga fpga 2958 Dec 3 09:31 Rakefile\r\n-rw-r--r-- 1 fpga fpga 647 Dec 3 09:31 devicetree.dts\r\n-rw-r--r-- 1 fpga fpga 4045564 Dec 3 09:31 pump_axi4.bin\r\n-rw-r--r-- 1 fpga fpga 2541 Dec 3 09:31 sample1.c\r\n-rw-r--r-- 1 fpga fpga 2746 Dec 3 09:31 sample2.c\r\n-rw-r--r-- 1 fpga fpga 5844 Dec 3 09:31 sample_common.h\r\ndrwxr-xr-x 2 fpga fpga 4096 Dec 3 09:31 uio_irq_sample\r\n<\/code><\/pre>\n\u6211\u4f1a\u5c06\u521a\u521a\u751f\u6210\u7684\u4f4d\u6d41\u590d\u5236\u5230\u8fd9\u91cc\u3002
\n\u6211\u5c06\u6211\u7684Zynq\u5f00\u53d1\u677f\u901a\u8fc7\u4ee5\u592a\u7f51\u8fde\u63a5\uff0c\u5e76\u901a\u8fc7SCP\u4f20\u8f93\u6587\u4ef6\u3002
\n\u7136\u800c\uff0c\u7531Xilinx\u751f\u6210\u7684\u4f4d\u6d41\u4e0d\u80fd\u76f4\u63a5\u4f7f\u7528\uff0c\u9700\u8981\u8fdb\u884c\u8f6c\u6362\u3002
\n\u53c2\u8003\uff1a\u4f7f\u7528Linux\u7684FPGA\u7ba1\u7406\u5668\u5904\u7406Xilinx\u4f4d\u6d41\u6587\u4ef6\u7684\u65b9\u6cd5\u3002<\/p>\n
\u4f7f\u7528wget\u547d\u4ee4\u4ece\u7f51\u4e0a\u83b7\u53d6Python\u811a\u672c\uff0c\u5e76\u8fdb\u884c\u8f6c\u6362\u3002
\n\u4ee5\u4e0b\u793a\u4f8b\u4e2d\uff0c\u5c06\u4ecesystem_wrapper.bit\u6587\u4ef6\u8f6c\u6362\u4e3aarty_gpio.bin\u6587\u4ef6\u3002
\n\u91cd\u8981\u9009\u9879\u662f–flip\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ wget https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\n--2017-12-03 09:41:38-- https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\nResolving raw.githubusercontent.com (raw.githubusercontent.com)... 151.101.72.133\r\nConnecting to raw.githubusercontent.com (raw.githubusercontent.com)|151.101.72.133|:443... connected.\r\nHTTP request sent, awaiting response... 200 OK\r\nLength: 2964 (2.9K) [text\/plain]\r\nSaving to: 'fpga-bit-to-bin.py'\r\n\r\nfpga-bit-to-bin.py 100%[===================>] 2.89K --.-KB\/s in 0.001s \r\n\r\n2017-12-03 09:41:38 (4.42 MB\/s) - 'fpga-bit-to-bin.py' saved [2964\/2964]\r\n\r\nfpga@debian-fpga:~\/my_uio_sample$ python fpga-bit-to-bin.py --flip system_wrapper.bit arty_gpio.bin\r\nDesign name: system_wrapper;UserID=0XFFFFFFFF;Version=2017.3\r\nFull bitstream\r\n('Partname', '7z020clg400\\x00')\r\n('Date', '2017\/11\/11\\x00')\r\n('Time', '17:46:53\\x00')\r\nFound binary data: 4045564\r\nFlipping data...\r\nWriting data...\r\nfpga@debian-fpga:~\/my_uio_sample$ \r\n<\/code><\/pre>\n\u4fee\u6539devicetree.dts\u6587\u4ef6\u3002<\/p>\n
\/dts-v1\/;\r\n\/ {\r\n fragment@0 {\r\n target-path = \"\/amba\/fpga-region0\";\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n __overlay__ {\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n firmware-name = \"arty_gpio.bin\"; #Vivado\u3067\u751f\u6210\u3057\u3066\u5909\u63db\u3057\u305fbin\u30d5\u30a1\u30a4\u30eb\u306b\u3059\u308b\r\n\r\n pump-uio@41210000 { #Vivado\u306eOffset\u306b\u3059\u308b\r\n compatible = \"generic-uio\";\r\n reg = <0x41210000 0x10000>; #Vivado\u306eOffset\u3068Range\u306b\u3059\u308b\u3002LED\u306fGPIO1\u306b\u63a5\u7d9a\u3055\u308c\u3066\u3044\u308b\u3002\r\n #interrupts = <0x0 0x1d 0x4>; #\u5272\u308a\u8fbc\u307f\u306f\u4f7f\u7528\u3057\u306a\u3044\r\n };\r\n\r\n pump-udmabuf4 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf4\";\r\n size = <0x00400000>;\r\n };\r\n\r\n pump-udmabuf5 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf5\";\r\n size = <0x00400000>;\r\n };\r\n };\r\n } ;\r\n} ;\r\n<\/code><\/pre>\n\u53ea\u9700\u66f4\u6539FPGA_BITSTREAM_FILE\uff0c\u5176\u4ed6\u7684\u6682\u65f6\u90fd\u6ca1\u95ee\u9898\u3002<\/p>\n
CC<\/span> =<\/span> \"gcc\"<\/span>\r\nCFLAGS<\/span> =<\/span> \"\"<\/span>\r\nFPGA_BITSTREAM_FILE<\/span> =<\/span> \"arty_gpio.bin\"<\/span> #\u3053\u3053\u3092\u5148\u307b\u3069\u751f\u6210\u3057\u305fbin\u306b\u3059\u308b<\/span>\r\nDEVICE_TREE_DIRECTORY<\/span> =<\/span> \"uio_irq_sample\"<\/span>\r\nDEVICE_TREE_FILE<\/span> =<\/span> \"devicetree.dts\"<\/span>\r\nUIO_DEVICE_NAME<\/span> =<\/span> \"uio0\"<\/span>\r\nUDMABUF4_DEVICE_NAME<\/span> =<\/span> \"udmabuf4\"<\/span>\r\nUDMABUF5_DEVICE_NAME<\/span> =<\/span> \"udmabuf5\"<\/span>\r\n<\/code><\/pre>\n\u800c\u4e14\uff0c\u636e\u8bf4\u53ea\u9700\u6267\u884csudo rake install\u5c31\u53ef\u4ee5\u52a0\u8f7d\u751f\u6210\u7684FPGA\u914d\u7f6e\u6587\u4ef6\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ sudo rake install\r\nsudo: unable to resolve host debian-fpga\r\n[sudo] password for fpga:\r\ncp arty_gpio.bin \/lib\/firmware\/arty_gpio.bin\r\ndtbocfg.rb --install uio_irq_sample --dts devicetree.dts\r\n\/config\/device-tree\/overlays\/uio_irq_sample\/dtbo: Warning (unit_a[ 29.758004] fpga_manager fpga0: writing arty_gpio.bin to Xilinx Zynq FPGA Manager\r\nddress_vs_reg): Node \/fragment@0 has a unit name, but no reg property\r\n[ 29.837519] udmabuf amba:fpga-region0:pump-udmabuf4: driver probe start.\r\n[ 29.861480] udmabuf udmabuf4: driver installed\r\n[ 29.865845] udmabuf udmabuf4: major number = 245\r\n[ 29.872518] udmabuf udmabuf4: minor number = 0\r\n[ 29.877058] udmabuf udmabuf4: phys address = 0x1f100000\r\n[ 29.884086] udmabuf udmabuf4: buffer size = 4194304\r\n[ 29.890086] udmabuf amba:fpga-region0:pump-udmabuf4: driver installed.\r\n[ 29.897096] udmabuf amba:fpga-region0:pump-udmabuf5: driver probe start.\r\n[ 29.920640] udmabuf udmabuf5: driver installed\r\n[ 29.925008] udmabuf udmabuf5: major number = 245\r\n[ 29.931676] udmabuf udmabuf5: minor number = 1\r\n[ 29.936213] udmabuf udmabuf5: phys address = 0x1f500000\r\n[ 29.943232] udmabuf udmabuf5: buffer size = 4194304\r\n[ 29.949204] udmabuf amba:fpga-region0:pump-udmabuf5: driver installed.\r\nfpga@debian-fpga:~\/my_uio_sample$\r\n\r\n<\/code><\/pre>\n\u5199\u4e00\u4e2a\u793a\u4f8b\u7a0b\u5e8f
\n\u6211\u5c06\u7f16\u5199\u7a0b\u5e8f\u65f6\u67e5\u770bXilinx AXI_GPIO\u89c4\u8303\u4e66\uff0c\u5b9e\u9645\u4e0a\u662f\u4ece\u540c\u4e00\u56e2\u961f\u7684\u6210\u5458\u90a3\u91cc\u63a5\u6536\u5230\u4e86\u6e90\u4ee3\u7801\uff08\u7b11\uff09\u3002\u8bf7\u53c2\u8003\u5b66\u4e60\u4f1a\u9875\u9762\u9644\u5e26\u7684PDF\u6587\u6863\u7684\u7b2c6\u9875\u3002\u53c2\u8003\u94fe\u63a5\uff1ahttp:\/\/www.motohashi.org\/omi\/tmp\/Zynq-L-chika.pdf<\/p>\n#include <sys\/types.h>\r\n#include <sys\/stat.h>\r\n#include <fcntl.h>\r\n#include <stdio.h>\r\n#include <assert.h>\r\n#include <sys\/mman.h>\r\n#include <unistd.h>\r\n<\/span>\r\nint<\/span> main<\/span>(<\/span>int<\/span> argc<\/span>,<\/span> char<\/span> *<\/span>argv<\/span>[])<\/span>\r\n{<\/span>\r\n int<\/span> fd<\/span>;<\/span>\r\n char<\/span> *<\/span>p<\/span>;<\/span>\r\n fd<\/span> =<\/span> open<\/span>(<\/span>\"\/dev\/uio0\"<\/span>,<\/span> O_RDWR<\/span>);<\/span>\r\n p<\/span> =<\/span> mmap<\/span>(<\/span>NULL<\/span>,<\/span> 4096<\/span>,<\/span> (<\/span>PROT_READ<\/span>|<\/span>PROT_WRITE<\/span>),<\/span> MAP_SHARED<\/span>,<\/span> fd<\/span>,<\/span> 0<\/span>);<\/span>\r\n *<\/span>(<\/span>p<\/span> +<\/span> 4<\/span>)<\/span> =<\/span> 0<\/span>;<\/span> \/\/ Set tristate register to output mode.<\/span>\r\n while<\/span> (<\/span>1<\/span>)<\/span> {<\/span>\r\n *<\/span>p<\/span> =<\/span> 0<\/span>;<\/span> \/\/ LED OFF<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n *<\/span>p<\/span> =<\/span> 0xff<\/span>;<\/span> \/\/ LED ON<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n }<\/span>\r\n}<\/span>\r\n<\/code><\/pre>\n\u7f16\u8bd1\u5e76\u6267\u884c\u4f7f\u7528Zynq\u5f00\u53d1\u677f\u8fdb\u884c\u7f16\u8bd1\u548c\u6267\u884c\u3002
\n\u6210\u529f\u5730\u5b8c\u6210\u4e86L\u95ea\u70c1\u3002<\/p>\nfpga@debian-fpga:~\/my_uio_sample$<\/span> gcc -o<\/span> led led.c\r\nfpga@debian-fpga:~\/my_uio_sample$<\/span> .\/led\r\n<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"\u6211\u662f\u524d\u51e0\u5929\u53c2\u52a0\u4e86\u8fd9\u4e2a\u6d3b\u52a8\u5e76\u4e14\u8fdb\u884c\u4e86L\u95ea\u70c1\u7684\uff0c\u6240\u4ee5\u8fd9\u662f\u5173\u4e8e\u90a3\u4e2a\u5de5\u4f5c\u8bb0\u5f55\u3002 \u672c\u6765\u6211\u60f3\u505a\u4e2d\u65ad\uff0bDMA\uff0c\u4f46\u662f\u65f6\u95f4\u4e0d\u591f\uff0c […]<\/p>\n","protected":false},"author":8,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[227],"class_list":["post-27249","post","type-post","status-publish","format-standard","hentry","category-uncategorized","tag-227"],"yoast_head":"\n
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<\/p>\n<\/p>\n\u901a\u8fc7\u8bbe\u5907\u6811\u5c06\u751f\u6210\u7684FPGA\u4e8c\u8fdb\u5236\u6587\u4ef6\u52a0\u8f7d\u8fdb\u53bb\u3002\u4f7f\u7528Teraterm\u7b49\u8fde\u63a5\u5230Zynq\u677f\uff0c\u5e76\u4f7f\u7528fpga\u7528\u6237\u767b\u5f55\u3002\u5bc6\u7801\u4e3afpga\u3002<\/p>\ndebian-fpga login: fpga\r\nPassword:\r\nLast login: Fri Nov 4 02:17:08 JST 2016 on ttyPS0\r\n<\/span>Linux debian-fpga 4.12.14-armv7-fpga #<\/span>3 SMP PREEMPT Mon Nov 13 15:14:45 JST 2017 armv7l\r\n\r\nThe programs included with the Debian GNU\/Linux system are free software;<\/span>\r\nthe exact distribution terms for each program are described in the\r\nindividual files in \/usr\/share\/doc\/*\/copyright.\r\n\r\nDebian GNU\/Linux comes with ABSOLUTELY NO WARRANTY, to the extent\r\npermitted by applicable law.\r\n<\/span>fpga@debian-fpga:~$<\/span>\r\n<\/code><\/pre>\n\u8bf7\u628a\u6837\u672c\u62ff\u6765\u3002\u62ff\u6765\u7684\u662fexamples\/uio_irq_sample\u3002<\/p>\n
fpga@debian-fpga:~$ cp examples\/uio_irq_sample\/ ~\/my_uio_sample -r\r\nfpga@debian-fpga:~$ cd my_uio_sample\r\nfpga@debian-fpga:~\/my_uio_sample$ ls -l\r\ntotal 1648\r\n-rw-r--r-- 1 fpga fpga 2958 Dec 3 09:31 Rakefile\r\n-rw-r--r-- 1 fpga fpga 647 Dec 3 09:31 devicetree.dts\r\n-rw-r--r-- 1 fpga fpga 4045564 Dec 3 09:31 pump_axi4.bin\r\n-rw-r--r-- 1 fpga fpga 2541 Dec 3 09:31 sample1.c\r\n-rw-r--r-- 1 fpga fpga 2746 Dec 3 09:31 sample2.c\r\n-rw-r--r-- 1 fpga fpga 5844 Dec 3 09:31 sample_common.h\r\ndrwxr-xr-x 2 fpga fpga 4096 Dec 3 09:31 uio_irq_sample\r\n<\/code><\/pre>\n\u6211\u4f1a\u5c06\u521a\u521a\u751f\u6210\u7684\u4f4d\u6d41\u590d\u5236\u5230\u8fd9\u91cc\u3002
\n\u6211\u5c06\u6211\u7684Zynq\u5f00\u53d1\u677f\u901a\u8fc7\u4ee5\u592a\u7f51\u8fde\u63a5\uff0c\u5e76\u901a\u8fc7SCP\u4f20\u8f93\u6587\u4ef6\u3002
\n\u7136\u800c\uff0c\u7531Xilinx\u751f\u6210\u7684\u4f4d\u6d41\u4e0d\u80fd\u76f4\u63a5\u4f7f\u7528\uff0c\u9700\u8981\u8fdb\u884c\u8f6c\u6362\u3002
\n\u53c2\u8003\uff1a\u4f7f\u7528Linux\u7684FPGA\u7ba1\u7406\u5668\u5904\u7406Xilinx\u4f4d\u6d41\u6587\u4ef6\u7684\u65b9\u6cd5\u3002<\/p>\n
\u4f7f\u7528wget\u547d\u4ee4\u4ece\u7f51\u4e0a\u83b7\u53d6Python\u811a\u672c\uff0c\u5e76\u8fdb\u884c\u8f6c\u6362\u3002
\n\u4ee5\u4e0b\u793a\u4f8b\u4e2d\uff0c\u5c06\u4ecesystem_wrapper.bit\u6587\u4ef6\u8f6c\u6362\u4e3aarty_gpio.bin\u6587\u4ef6\u3002
\n\u91cd\u8981\u9009\u9879\u662f–flip\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ wget https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\n--2017-12-03 09:41:38-- https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\nResolving raw.githubusercontent.com (raw.githubusercontent.com)... 151.101.72.133\r\nConnecting to raw.githubusercontent.com (raw.githubusercontent.com)|151.101.72.133|:443... connected.\r\nHTTP request sent, awaiting response... 200 OK\r\nLength: 2964 (2.9K) [text\/plain]\r\nSaving to: 'fpga-bit-to-bin.py'\r\n\r\nfpga-bit-to-bin.py 100%[===================>] 2.89K --.-KB\/s in 0.001s \r\n\r\n2017-12-03 09:41:38 (4.42 MB\/s) - 'fpga-bit-to-bin.py' saved [2964\/2964]\r\n\r\nfpga@debian-fpga:~\/my_uio_sample$ python fpga-bit-to-bin.py --flip system_wrapper.bit arty_gpio.bin\r\nDesign name: system_wrapper;UserID=0XFFFFFFFF;Version=2017.3\r\nFull bitstream\r\n('Partname', '7z020clg400\\x00')\r\n('Date', '2017\/11\/11\\x00')\r\n('Time', '17:46:53\\x00')\r\nFound binary data: 4045564\r\nFlipping data...\r\nWriting data...\r\nfpga@debian-fpga:~\/my_uio_sample$ \r\n<\/code><\/pre>\n\u4fee\u6539devicetree.dts\u6587\u4ef6\u3002<\/p>\n
\/dts-v1\/;\r\n\/ {\r\n fragment@0 {\r\n target-path = \"\/amba\/fpga-region0\";\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n __overlay__ {\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n firmware-name = \"arty_gpio.bin\"; #Vivado\u3067\u751f\u6210\u3057\u3066\u5909\u63db\u3057\u305fbin\u30d5\u30a1\u30a4\u30eb\u306b\u3059\u308b\r\n\r\n pump-uio@41210000 { #Vivado\u306eOffset\u306b\u3059\u308b\r\n compatible = \"generic-uio\";\r\n reg = <0x41210000 0x10000>; #Vivado\u306eOffset\u3068Range\u306b\u3059\u308b\u3002LED\u306fGPIO1\u306b\u63a5\u7d9a\u3055\u308c\u3066\u3044\u308b\u3002\r\n #interrupts = <0x0 0x1d 0x4>; #\u5272\u308a\u8fbc\u307f\u306f\u4f7f\u7528\u3057\u306a\u3044\r\n };\r\n\r\n pump-udmabuf4 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf4\";\r\n size = <0x00400000>;\r\n };\r\n\r\n pump-udmabuf5 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf5\";\r\n size = <0x00400000>;\r\n };\r\n };\r\n } ;\r\n} ;\r\n<\/code><\/pre>\n\u53ea\u9700\u66f4\u6539FPGA_BITSTREAM_FILE\uff0c\u5176\u4ed6\u7684\u6682\u65f6\u90fd\u6ca1\u95ee\u9898\u3002<\/p>\n
CC<\/span> =<\/span> \"gcc\"<\/span>\r\nCFLAGS<\/span> =<\/span> \"\"<\/span>\r\nFPGA_BITSTREAM_FILE<\/span> =<\/span> \"arty_gpio.bin\"<\/span> #\u3053\u3053\u3092\u5148\u307b\u3069\u751f\u6210\u3057\u305fbin\u306b\u3059\u308b<\/span>\r\nDEVICE_TREE_DIRECTORY<\/span> =<\/span> \"uio_irq_sample\"<\/span>\r\nDEVICE_TREE_FILE<\/span> =<\/span> \"devicetree.dts\"<\/span>\r\nUIO_DEVICE_NAME<\/span> =<\/span> \"uio0\"<\/span>\r\nUDMABUF4_DEVICE_NAME<\/span> =<\/span> \"udmabuf4\"<\/span>\r\nUDMABUF5_DEVICE_NAME<\/span> =<\/span> \"udmabuf5\"<\/span>\r\n<\/code><\/pre>\n\u800c\u4e14\uff0c\u636e\u8bf4\u53ea\u9700\u6267\u884csudo rake install\u5c31\u53ef\u4ee5\u52a0\u8f7d\u751f\u6210\u7684FPGA\u914d\u7f6e\u6587\u4ef6\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ sudo rake install\r\nsudo: unable to resolve host debian-fpga\r\n[sudo] password for fpga:\r\ncp arty_gpio.bin \/lib\/firmware\/arty_gpio.bin\r\ndtbocfg.rb --install uio_irq_sample --dts devicetree.dts\r\n\/config\/device-tree\/overlays\/uio_irq_sample\/dtbo: Warning (unit_a[ 29.758004] fpga_manager fpga0: writing arty_gpio.bin to Xilinx Zynq FPGA Manager\r\nddress_vs_reg): Node \/fragment@0 has a unit name, but no reg property\r\n[ 29.837519] udmabuf amba:fpga-region0:pump-udmabuf4: driver probe start.\r\n[ 29.861480] udmabuf udmabuf4: driver installed\r\n[ 29.865845] udmabuf udmabuf4: major number = 245\r\n[ 29.872518] udmabuf udmabuf4: minor number = 0\r\n[ 29.877058] udmabuf udmabuf4: phys address = 0x1f100000\r\n[ 29.884086] udmabuf udmabuf4: buffer size = 4194304\r\n[ 29.890086] udmabuf amba:fpga-region0:pump-udmabuf4: driver installed.\r\n[ 29.897096] udmabuf amba:fpga-region0:pump-udmabuf5: driver probe start.\r\n[ 29.920640] udmabuf udmabuf5: driver installed\r\n[ 29.925008] udmabuf udmabuf5: major number = 245\r\n[ 29.931676] udmabuf udmabuf5: minor number = 1\r\n[ 29.936213] udmabuf udmabuf5: phys address = 0x1f500000\r\n[ 29.943232] udmabuf udmabuf5: buffer size = 4194304\r\n[ 29.949204] udmabuf amba:fpga-region0:pump-udmabuf5: driver installed.\r\nfpga@debian-fpga:~\/my_uio_sample$\r\n\r\n<\/code><\/pre>\n\u5199\u4e00\u4e2a\u793a\u4f8b\u7a0b\u5e8f
\n\u6211\u5c06\u7f16\u5199\u7a0b\u5e8f\u65f6\u67e5\u770bXilinx AXI_GPIO\u89c4\u8303\u4e66\uff0c\u5b9e\u9645\u4e0a\u662f\u4ece\u540c\u4e00\u56e2\u961f\u7684\u6210\u5458\u90a3\u91cc\u63a5\u6536\u5230\u4e86\u6e90\u4ee3\u7801\uff08\u7b11\uff09\u3002\u8bf7\u53c2\u8003\u5b66\u4e60\u4f1a\u9875\u9762\u9644\u5e26\u7684PDF\u6587\u6863\u7684\u7b2c6\u9875\u3002\u53c2\u8003\u94fe\u63a5\uff1ahttp:\/\/www.motohashi.org\/omi\/tmp\/Zynq-L-chika.pdf<\/p>\n#include <sys\/types.h>\r\n#include <sys\/stat.h>\r\n#include <fcntl.h>\r\n#include <stdio.h>\r\n#include <assert.h>\r\n#include <sys\/mman.h>\r\n#include <unistd.h>\r\n<\/span>\r\nint<\/span> main<\/span>(<\/span>int<\/span> argc<\/span>,<\/span> char<\/span> *<\/span>argv<\/span>[])<\/span>\r\n{<\/span>\r\n int<\/span> fd<\/span>;<\/span>\r\n char<\/span> *<\/span>p<\/span>;<\/span>\r\n fd<\/span> =<\/span> open<\/span>(<\/span>\"\/dev\/uio0\"<\/span>,<\/span> O_RDWR<\/span>);<\/span>\r\n p<\/span> =<\/span> mmap<\/span>(<\/span>NULL<\/span>,<\/span> 4096<\/span>,<\/span> (<\/span>PROT_READ<\/span>|<\/span>PROT_WRITE<\/span>),<\/span> MAP_SHARED<\/span>,<\/span> fd<\/span>,<\/span> 0<\/span>);<\/span>\r\n *<\/span>(<\/span>p<\/span> +<\/span> 4<\/span>)<\/span> =<\/span> 0<\/span>;<\/span> \/\/ Set tristate register to output mode.<\/span>\r\n while<\/span> (<\/span>1<\/span>)<\/span> {<\/span>\r\n *<\/span>p<\/span> =<\/span> 0<\/span>;<\/span> \/\/ LED OFF<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n *<\/span>p<\/span> =<\/span> 0xff<\/span>;<\/span> \/\/ LED ON<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n }<\/span>\r\n}<\/span>\r\n<\/code><\/pre>\n\u7f16\u8bd1\u5e76\u6267\u884c\u4f7f\u7528Zynq\u5f00\u53d1\u677f\u8fdb\u884c\u7f16\u8bd1\u548c\u6267\u884c\u3002
\n\u6210\u529f\u5730\u5b8c\u6210\u4e86L\u95ea\u70c1\u3002<\/p>\nfpga@debian-fpga:~\/my_uio_sample$<\/span> gcc -o<\/span> led led.c\r\nfpga@debian-fpga:~\/my_uio_sample$<\/span> .\/led\r\n<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"\u6211\u662f\u524d\u51e0\u5929\u53c2\u52a0\u4e86\u8fd9\u4e2a\u6d3b\u52a8\u5e76\u4e14\u8fdb\u884c\u4e86L\u95ea\u70c1\u7684\uff0c\u6240\u4ee5\u8fd9\u662f\u5173\u4e8e\u90a3\u4e2a\u5de5\u4f5c\u8bb0\u5f55\u3002 \u672c\u6765\u6211\u60f3\u505a\u4e2d\u65ad\uff0bDMA\uff0c\u4f46\u662f\u65f6\u95f4\u4e0d\u591f\uff0c […]<\/p>\n","protected":false},"author":8,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[227],"class_list":["post-27249","post","type-post","status-publish","format-standard","hentry","category-uncategorized","tag-227"],"yoast_head":"\n
\u6211\u53c2\u52a0\u4e86FPGA+SoC+Linux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728Arty-Z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e\u9a8c - Blog - Silicon Cloud<\/title>\n<meta name=\"description\" content=\"\u5173\u4e8e\u6211\u53c2\u52a0\u4e86FPGA+SoC+Linux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728Arty-Z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e\u9a8c\u7684\u6280\u672f\u6587\u7ae0\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.silicloud.com\/zh\/blog\/\u6211\u53c2\u52a0\u4e86fpgasoclinux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728arty-z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e-2\/\" \/>\n<meta property=\"og:locale\" content=\"zh_CN\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"\u6211\u53c2\u52a0\u4e86FPGA+SoC+Linux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728Arty-Z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e\u9a8c\" \/>\n<meta property=\"og:description\" content=\"\u5173\u4e8e\u6211\u53c2\u52a0\u4e86FPGA+SoC+Linux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728Arty-Z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e\u9a8c\u7684\u6280\u672f\u6587\u7ae0\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.silicloud.com\/zh\/blog\/\u6211\u53c2\u52a0\u4e86fpgasoclinux\u5b9e\u8df5\u5b66\u4e60\u73ed\uff0c\u5728arty-z7\u4e0a\u8fdb\u884c\u4e86\u95ea\u70c1\u7684\u5b9e-2\/\" \/>\n<meta property=\"og:site_name\" content=\"Blog - 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debian-fpga login: fpga\r\nPassword:\r\nLast login: Fri Nov 4 02:17:08 JST 2016 on ttyPS0\r\n<\/span>Linux debian-fpga 4.12.14-armv7-fpga #<\/span>3 SMP PREEMPT Mon Nov 13 15:14:45 JST 2017 armv7l\r\n\r\nThe programs included with the Debian GNU\/Linux system are free software;<\/span>\r\nthe exact distribution terms for each program are described in the\r\nindividual files in \/usr\/share\/doc\/*\/copyright.\r\n\r\nDebian GNU\/Linux comes with ABSOLUTELY NO WARRANTY, to the extent\r\npermitted by applicable law.\r\n<\/span>fpga@debian-fpga:~$<\/span>\r\n<\/code><\/pre>\n\u8bf7\u628a\u6837\u672c\u62ff\u6765\u3002\u62ff\u6765\u7684\u662fexamples\/uio_irq_sample\u3002<\/p>\n
fpga@debian-fpga:~$ cp examples\/uio_irq_sample\/ ~\/my_uio_sample -r\r\nfpga@debian-fpga:~$ cd my_uio_sample\r\nfpga@debian-fpga:~\/my_uio_sample$ ls -l\r\ntotal 1648\r\n-rw-r--r-- 1 fpga fpga 2958 Dec 3 09:31 Rakefile\r\n-rw-r--r-- 1 fpga fpga 647 Dec 3 09:31 devicetree.dts\r\n-rw-r--r-- 1 fpga fpga 4045564 Dec 3 09:31 pump_axi4.bin\r\n-rw-r--r-- 1 fpga fpga 2541 Dec 3 09:31 sample1.c\r\n-rw-r--r-- 1 fpga fpga 2746 Dec 3 09:31 sample2.c\r\n-rw-r--r-- 1 fpga fpga 5844 Dec 3 09:31 sample_common.h\r\ndrwxr-xr-x 2 fpga fpga 4096 Dec 3 09:31 uio_irq_sample\r\n<\/code><\/pre>\n\u6211\u4f1a\u5c06\u521a\u521a\u751f\u6210\u7684\u4f4d\u6d41\u590d\u5236\u5230\u8fd9\u91cc\u3002
\n\u6211\u5c06\u6211\u7684Zynq\u5f00\u53d1\u677f\u901a\u8fc7\u4ee5\u592a\u7f51\u8fde\u63a5\uff0c\u5e76\u901a\u8fc7SCP\u4f20\u8f93\u6587\u4ef6\u3002
\n\u7136\u800c\uff0c\u7531Xilinx\u751f\u6210\u7684\u4f4d\u6d41\u4e0d\u80fd\u76f4\u63a5\u4f7f\u7528\uff0c\u9700\u8981\u8fdb\u884c\u8f6c\u6362\u3002
\n\u53c2\u8003\uff1a\u4f7f\u7528Linux\u7684FPGA\u7ba1\u7406\u5668\u5904\u7406Xilinx\u4f4d\u6d41\u6587\u4ef6\u7684\u65b9\u6cd5\u3002<\/p>\n
\u4f7f\u7528wget\u547d\u4ee4\u4ece\u7f51\u4e0a\u83b7\u53d6Python\u811a\u672c\uff0c\u5e76\u8fdb\u884c\u8f6c\u6362\u3002
\n\u4ee5\u4e0b\u793a\u4f8b\u4e2d\uff0c\u5c06\u4ecesystem_wrapper.bit\u6587\u4ef6\u8f6c\u6362\u4e3aarty_gpio.bin\u6587\u4ef6\u3002
\n\u91cd\u8981\u9009\u9879\u662f–flip\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ wget https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\n--2017-12-03 09:41:38-- https:\/\/raw.githubusercontent.com\/topic-embedded-products\/meta-topic\/master\/recipes-bsp\/fpga\/fpga-bit-to-bin\/fpga-bit-to-bin.py\r\nResolving raw.githubusercontent.com (raw.githubusercontent.com)... 151.101.72.133\r\nConnecting to raw.githubusercontent.com (raw.githubusercontent.com)|151.101.72.133|:443... connected.\r\nHTTP request sent, awaiting response... 200 OK\r\nLength: 2964 (2.9K) [text\/plain]\r\nSaving to: 'fpga-bit-to-bin.py'\r\n\r\nfpga-bit-to-bin.py 100%[===================>] 2.89K --.-KB\/s in 0.001s \r\n\r\n2017-12-03 09:41:38 (4.42 MB\/s) - 'fpga-bit-to-bin.py' saved [2964\/2964]\r\n\r\nfpga@debian-fpga:~\/my_uio_sample$ python fpga-bit-to-bin.py --flip system_wrapper.bit arty_gpio.bin\r\nDesign name: system_wrapper;UserID=0XFFFFFFFF;Version=2017.3\r\nFull bitstream\r\n('Partname', '7z020clg400\\x00')\r\n('Date', '2017\/11\/11\\x00')\r\n('Time', '17:46:53\\x00')\r\nFound binary data: 4045564\r\nFlipping data...\r\nWriting data...\r\nfpga@debian-fpga:~\/my_uio_sample$ \r\n<\/code><\/pre>\n\u4fee\u6539devicetree.dts\u6587\u4ef6\u3002<\/p>\n
\/dts-v1\/;\r\n\/ {\r\n fragment@0 {\r\n target-path = \"\/amba\/fpga-region0\";\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n __overlay__ {\r\n #address-cells = <0x1>;\r\n #size-cells = <0x1>;\r\n\r\n firmware-name = \"arty_gpio.bin\"; #Vivado\u3067\u751f\u6210\u3057\u3066\u5909\u63db\u3057\u305fbin\u30d5\u30a1\u30a4\u30eb\u306b\u3059\u308b\r\n\r\n pump-uio@41210000 { #Vivado\u306eOffset\u306b\u3059\u308b\r\n compatible = \"generic-uio\";\r\n reg = <0x41210000 0x10000>; #Vivado\u306eOffset\u3068Range\u306b\u3059\u308b\u3002LED\u306fGPIO1\u306b\u63a5\u7d9a\u3055\u308c\u3066\u3044\u308b\u3002\r\n #interrupts = <0x0 0x1d 0x4>; #\u5272\u308a\u8fbc\u307f\u306f\u4f7f\u7528\u3057\u306a\u3044\r\n };\r\n\r\n pump-udmabuf4 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf4\";\r\n size = <0x00400000>;\r\n };\r\n\r\n pump-udmabuf5 {\r\n compatible = \"ikwzm,udmabuf-0.10.a\";\r\n device-name = \"udmabuf5\";\r\n size = <0x00400000>;\r\n };\r\n };\r\n } ;\r\n} ;\r\n<\/code><\/pre>\n\u53ea\u9700\u66f4\u6539FPGA_BITSTREAM_FILE\uff0c\u5176\u4ed6\u7684\u6682\u65f6\u90fd\u6ca1\u95ee\u9898\u3002<\/p>\n
CC<\/span> =<\/span> \"gcc\"<\/span>\r\nCFLAGS<\/span> =<\/span> \"\"<\/span>\r\nFPGA_BITSTREAM_FILE<\/span> =<\/span> \"arty_gpio.bin\"<\/span> #\u3053\u3053\u3092\u5148\u307b\u3069\u751f\u6210\u3057\u305fbin\u306b\u3059\u308b<\/span>\r\nDEVICE_TREE_DIRECTORY<\/span> =<\/span> \"uio_irq_sample\"<\/span>\r\nDEVICE_TREE_FILE<\/span> =<\/span> \"devicetree.dts\"<\/span>\r\nUIO_DEVICE_NAME<\/span> =<\/span> \"uio0\"<\/span>\r\nUDMABUF4_DEVICE_NAME<\/span> =<\/span> \"udmabuf4\"<\/span>\r\nUDMABUF5_DEVICE_NAME<\/span> =<\/span> \"udmabuf5\"<\/span>\r\n<\/code><\/pre>\n\u800c\u4e14\uff0c\u636e\u8bf4\u53ea\u9700\u6267\u884csudo rake install\u5c31\u53ef\u4ee5\u52a0\u8f7d\u751f\u6210\u7684FPGA\u914d\u7f6e\u6587\u4ef6\u3002<\/p>\n
fpga@debian-fpga:~\/my_uio_sample$ sudo rake install\r\nsudo: unable to resolve host debian-fpga\r\n[sudo] password for fpga:\r\ncp arty_gpio.bin \/lib\/firmware\/arty_gpio.bin\r\ndtbocfg.rb --install uio_irq_sample --dts devicetree.dts\r\n\/config\/device-tree\/overlays\/uio_irq_sample\/dtbo: Warning (unit_a[ 29.758004] fpga_manager fpga0: writing arty_gpio.bin to Xilinx Zynq FPGA Manager\r\nddress_vs_reg): Node \/fragment@0 has a unit name, but no reg property\r\n[ 29.837519] udmabuf amba:fpga-region0:pump-udmabuf4: driver probe start.\r\n[ 29.861480] udmabuf udmabuf4: driver installed\r\n[ 29.865845] udmabuf udmabuf4: major number = 245\r\n[ 29.872518] udmabuf udmabuf4: minor number = 0\r\n[ 29.877058] udmabuf udmabuf4: phys address = 0x1f100000\r\n[ 29.884086] udmabuf udmabuf4: buffer size = 4194304\r\n[ 29.890086] udmabuf amba:fpga-region0:pump-udmabuf4: driver installed.\r\n[ 29.897096] udmabuf amba:fpga-region0:pump-udmabuf5: driver probe start.\r\n[ 29.920640] udmabuf udmabuf5: driver installed\r\n[ 29.925008] udmabuf udmabuf5: major number = 245\r\n[ 29.931676] udmabuf udmabuf5: minor number = 1\r\n[ 29.936213] udmabuf udmabuf5: phys address = 0x1f500000\r\n[ 29.943232] udmabuf udmabuf5: buffer size = 4194304\r\n[ 29.949204] udmabuf amba:fpga-region0:pump-udmabuf5: driver installed.\r\nfpga@debian-fpga:~\/my_uio_sample$\r\n\r\n<\/code><\/pre>\n\u5199\u4e00\u4e2a\u793a\u4f8b\u7a0b\u5e8f
\n\u6211\u5c06\u7f16\u5199\u7a0b\u5e8f\u65f6\u67e5\u770bXilinx AXI_GPIO\u89c4\u8303\u4e66\uff0c\u5b9e\u9645\u4e0a\u662f\u4ece\u540c\u4e00\u56e2\u961f\u7684\u6210\u5458\u90a3\u91cc\u63a5\u6536\u5230\u4e86\u6e90\u4ee3\u7801\uff08\u7b11\uff09\u3002\u8bf7\u53c2\u8003\u5b66\u4e60\u4f1a\u9875\u9762\u9644\u5e26\u7684PDF\u6587\u6863\u7684\u7b2c6\u9875\u3002\u53c2\u8003\u94fe\u63a5\uff1ahttp:\/\/www.motohashi.org\/omi\/tmp\/Zynq-L-chika.pdf<\/p>\n#include <sys\/types.h>\r\n#include <sys\/stat.h>\r\n#include <fcntl.h>\r\n#include <stdio.h>\r\n#include <assert.h>\r\n#include <sys\/mman.h>\r\n#include <unistd.h>\r\n<\/span>\r\nint<\/span> main<\/span>(<\/span>int<\/span> argc<\/span>,<\/span> char<\/span> *<\/span>argv<\/span>[])<\/span>\r\n{<\/span>\r\n int<\/span> fd<\/span>;<\/span>\r\n char<\/span> *<\/span>p<\/span>;<\/span>\r\n fd<\/span> =<\/span> open<\/span>(<\/span>\"\/dev\/uio0\"<\/span>,<\/span> O_RDWR<\/span>);<\/span>\r\n p<\/span> =<\/span> mmap<\/span>(<\/span>NULL<\/span>,<\/span> 4096<\/span>,<\/span> (<\/span>PROT_READ<\/span>|<\/span>PROT_WRITE<\/span>),<\/span> MAP_SHARED<\/span>,<\/span> fd<\/span>,<\/span> 0<\/span>);<\/span>\r\n *<\/span>(<\/span>p<\/span> +<\/span> 4<\/span>)<\/span> =<\/span> 0<\/span>;<\/span> \/\/ Set tristate register to output mode.<\/span>\r\n while<\/span> (<\/span>1<\/span>)<\/span> {<\/span>\r\n *<\/span>p<\/span> =<\/span> 0<\/span>;<\/span> \/\/ LED OFF<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n *<\/span>p<\/span> =<\/span> 0xff<\/span>;<\/span> \/\/ LED ON<\/span>\r\n sleep<\/span>(<\/span>1<\/span>);<\/span>\r\n }<\/span>\r\n}<\/span>\r\n<\/code><\/pre>\n\u7f16\u8bd1\u5e76\u6267\u884c\u4f7f\u7528Zynq\u5f00\u53d1\u677f\u8fdb\u884c\u7f16\u8bd1\u548c\u6267\u884c\u3002
\n\u6210\u529f\u5730\u5b8c\u6210\u4e86L\u95ea\u70c1\u3002<\/p>\nfpga@debian-fpga:~\/my_uio_sample$<\/span> gcc -o<\/span> led led.c\r\nfpga@debian-fpga:~\/my_uio_sample$<\/span> .\/led\r\n<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"\u6211\u662f\u524d\u51e0\u5929\u53c2\u52a0\u4e86\u8fd9\u4e2a\u6d3b\u52a8\u5e76\u4e14\u8fdb\u884c\u4e86L\u95ea\u70c1\u7684\uff0c\u6240\u4ee5\u8fd9\u662f\u5173\u4e8e\u90a3\u4e2a\u5de5\u4f5c\u8bb0\u5f55\u3002 \u672c\u6765\u6211\u60f3\u505a\u4e2d\u65ad\uff0bDMA\uff0c\u4f46\u662f\u65f6\u95f4\u4e0d\u591f\uff0c […]<\/p>\n","protected":false},"author":8,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[227],"class_list":["post-27249","post","type-post","status-publish","format-standard","hentry","category-uncategorized","tag-227"],"yoast_head":"\n
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